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HT46R技术资料开发设计用的重要资料.zip

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HT46R技术资料开发设计用的重要资料.zip
HT46R064/065/066/0662/067
Enhanced A/D Type 8-Bit OTP MCU
Rev. 1.10 1 June 9, 2009
General Description
The Enhanced A/D MCUs are a series of 8-bit high per-
formance, RISC architecture microcontrollers specifi-
cally designed for a wide range of applications. The
usual Holtek microcontroller features of low power con-
sumption, I/O flexibility, timer functions, oscillator op-
tions, power down and wake-up functions, watchdog
timer and low voltage reset, combine to provide devices
with a huge range of functional options while still main-
taining a high level of cost effectiveness. The fully inte-
grated system oscillator HIRC, which requires no
external components and which has three frequency
selections, opens up a huge range of new application
possibilities for these devices, some of which may in-
clude industrial control, consumer products, household
appliances subsystem controllers, etc.
Features
CPU Features
·
Operating voltage:
f
SYS
= 4MHz: 2.2V~5.5V
f
SYS
= 8MHz: 3.0V~5.5V
f
SYS
= 12MHz: 4.5V~5.5V
·
Up to 0.33ms instruction cycle with 12MHz system
clock at V
DD
=5V
·
Idle/Sleep mode and wake-up functions to reduce
power consumption
·
Oscillator types:
External high freuency Crystal -- HXT
External RC -- ERC
Internal RC -- HIRC
External low frequency crystal -- LXT
·
Four operational modes: Normal, Slow, Idle, Sleep
·
Fully integrated internal 4MHz, 8MHz and 12MHz
oscillator requires no external components
·
Watchdog Timer function
·
LIRC oscillator function for watchdog timer
·
All instructions executed in one or two instruction
cycles
·
Table read instructions
·
63 powerful instructions
·
Up to 8-level subroutine nesting
·
Bit manipulation instruction
·
Low voltage reset function
·
Wide range of available package types
Peripheral Features
·
Up to 42 bidirectional I/O lines
·
Up to 8 channel 12-bit ADC
·
Up to 3 channel 8-bit PWM
·
Software controlled 4-SCOM lines LCD driver with
1
/
2 bias
·
External interrupt input shared with an I/O line
·
Up to three 8-bit programmable Timer/Event
Counter with overflow interrupt and prescaler
·
Time-Base function
·
Programmable Frequency Divider - PFD
Technical Document
·
Application Note
-
HA0075E MCU Reset and Oscillator Circuits Application Note
Selection Table
Part No.
Program
Memory
Data
Memory
I/O
8-bit
Timer
Time
Base
HIRC
(MHz)
RTC
(LXT)
LCD
SCOM
A/D PWM PFD Stack Package
HT46R064
1K´14 64´8
18 1 1 4/8/12
Ö¾
12-bit´4
8-bit´1 Ö
4
16DIP/NSOP,
20DIP/SOP/SSOP
HT46R065
2K´15 96´8
22 2 1 4/8/12
Ö
4
12-bit´4
8-bit´1 Ö
6
16DIP/NSOP,
20DIP/SOP/SSOP,
24SKDIP/SOP/SSOP
HT46R066
4K´15 128´8
26 2 1 4/8/12
Ö
4
12-bit´8
8-bit´2 Ö
6
16DIP/NSOP,
20DIP/SOP/SSOP,
24/28SKDIP/SOP/SSOP
HT46R0662
4K´15 224´8
42 2 1 4/8/12
Ö (*)
4
12-bit´8
8-bit´2 Ö
6
24/28SKDIP/SOP/SSOP,
44QFP
HT46R067
8K´16 384´8
42 3 1 4/8/12
Ö (*)
4
12-bit´8
8-bit´3 Ö
8
24/28SKDIP/SOP/SSOP,
44QFP
Note: ²*² the oscillator is connected to the XT1/XT2 pins with TinyPower
TM
design.
Block Diagram
The following block diagram illustrates the main functional blocks.
HT46R064/065/066/0662/067
Rev. 1.10 2 June 9, 2009
8 - b i t
R I S C
M C U
C o r e
T i m e r
I / O
P o r t s
T i m e
B a s e
L C D
S C O M
P F D
D r i v e r
P W M
D r i v e r
R O M / R A M
M e m o r y
T i m i n g
G e r n e r a t i o n
A / D
C o n v e r t e r
Pin Assignment
HT46R064/065/066/0662/067
Rev. 1.10 3 June 9, 2009
P A 4 / P W M 0
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P B 5
P B 4
P B 3
H T 4 6 R 0 6 4
1 6 D I P - A / N S O P - A
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
1
2
3
4
5
6
7
8
H T 4 6 R 0 6 4
2 0 D I P - A / S O P - A / S S O P - A
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 0
P C 1
P B 0
P B 1
P B 2
P A 4 / P W M 0
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 3
P C 2
P B 5
P B 4
P B 3
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P B 0
P B 1
P B 2
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1
2
3
4
5
6
7
8
9
1 0
H T 4 6 R 0 6 5
1 6 D I P - A / N S O P - A
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P B 5
P B 4
P B 3 / S C O M 3
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
1
2
3
4
5
6
7
8
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
H T 4 6 R 0 6 5
2 0 D I P - A / S O P - A / S S O P - A
H T 4 6 R 0 6 5
2 4 S K D I P - A / S O P - A / S S O P - A
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1
2
3
4
5
6
7
8
9
1 0
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 0
P C 1
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 3
P C 2
P B 5
P B 4
P B 3 / S C O M 3
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6
P C 7
P C 0
P C 1
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5
P C 4
P C 3
P C 2
P B 5
P B 4
P B 3 / S C O M 3
H T 4 6 R 0 6 6
2 0 D I P - A / S O P - A / S S O P - A
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 3 / P W M 1
P C 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1
2
3
4
5
6
7
8
9
1 0
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 0 / A N 4
P C 1 / A N 5
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
H T 4 6 R 0 6 6
2 4 S K D I P - A / S O P - A / S S O P - A
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5
P C 4
P C 3 / P W M 1
P C 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
H T 4 6 R 0 6 6
2 8 S K D I P - A / S O P - A / S S O P - A
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P D 0
P D 1
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5
P C 4
P C 3 / P W M 1
P C 2
P D 3
P D 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
H T 4 6 R 0 6 6
1 6 D I P - A / N S O P - A
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 3 / P W M 1
P B 4
P B 3 / S C O M 3
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
1
2
3
4
5
6
7
8
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
Note: Bracketed pin names indicate non-default pinout remapping locations.
HT46R064/065/066/0662/067
Rev. 1.10 4 June 9, 2009
H T 4 6 R 0 6 6 2
2 4 S K D I P - A / S O P - A / S S O P - A
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5 / X T 1
P C 4 / X T 2
P C 3 / P W M 1
P C 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
H T 4 6 R 0 6 6 2
2 8 S K D I P - A / S O P - A / S S O P - A
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P D 0
P D 1
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5 / X T 1
P C 4 / X T 2
P C 3 / P W M 1
P C 2
P D 3
P D 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
V D D
P A 7 / R E S
P A 6 / O S C 1
P A 5 / O S C 2
P A 4 / P W M 0 / T C 1
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 5 / X T 1
P C 4 / X T 2
P C 3 / P W M 1
P C 2
P D 7
P D 6
P D 5
P D 4
P D 3
P D 2
P F 1
H T 4 6 R 0 6 6 2
4 4 Q F P - A
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 43 53 63 73 83 94 04 14 24 34 4
P F 0
P B 7
P B 6
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
P B 2 / S C O M 2
P B 1 / S C O M 1
P B 0 / S C O M 0
P D 1
P D 0
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P E 0
P E 1
P E 2
P E 3
P E 4
P E 5
P E 6
P E 7
P C 5 / X T 1
P C 4 / X T 2
P C 3 / P W M 1
P C 2 / P W M 2
P D 7
P D 6
P D 5
P D 4
P D 3
P D 2 / T C 2
P F 1
H T 4 6 R 0 6 7
4 4 Q F P - A
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 43 53 63 73 83 94 04 14 24 34 4
V D D
P A 7 / R E S
P A 6 / O S C 1
P A 5 / O S C 2
P A 4 / P W M 0 / T C 1
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P E 0
P E 1
P E 2
P E 3
P E 4
P E 5
P E 6
P E 7
P F 0
P B 7
P B 6
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
P B 2 / S C O M 2
P B 1 / S C O M 1
P B 0 / S C O M 0
P D 1
P D 0
H T 4 6 R 0 6 7
2 4 S K D I P - A / S O P - A / S S O P - A
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5 / X T 1
P C 4 / X T 2
P C 3 / P W M 1
P C 2 / P W M 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
H T 4 6 R 0 6 7
2 8 S K D I P - A / S O P - A / S S O P - A
P A 3 / I N T / A N 3
P A 2 / T C 0 / A N 2
P A 1 / P F D / A N 1
P A 0 / A N 0
V S S
P C 6 / A N 6
P C 7 / A N 7
P C 0 / A N 4
P C 1 / A N 5
P D 0
P D 1
P B 0 / S C O M 0
P B 1 / S C O M 1
P B 2 / / S C O M 2
P A 4 / P W M 0 / T C 1
P A 5 / O S C 2
P A 6 / O S C 1
P A 7 / R E S
V D D
P C 5 / X T 1
P C 4 / X T 2
P C 3 / P W M 1
P C 2 / P W M 2
P D 3
P D 2 / T C 2
P B 5 / [ I N T ]
P B 4 / [ T C 0 ]
P B 3 / S C O M 3 / [ P F D ]
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
Pin Description
HT46R064
Pin Name Function OPT I/T O/T Description
PA0/AN0
PA0
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
AN0 ADCR AN
¾
A/D channel 0
PA1/PFD/AN1
PA1
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
PFD CTRL0
¾
CMOS PFD output
AN1 ADCR AN
¾
A/D channel 1
PA2/TC0/AN2
PA2
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
TC0
¾
ST
¾
External Timer 0 clock input
AN2 ADCR AN
¾
A/D channel 2
PA3/INT/AN3
PA3
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
INT
¾
ST
¾
External interrupt input
AN3 ADCR AN
¾
A/D channel 3
PA4/PWM0
PA4
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
PWM0 CTRL0
¾
CMOS PWM output
PA5/OSC2
PA5
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC2 CO
¾
OSC Oscillator pin
PA6/OSC1
PA6
PAPU
PAWK
ST CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC1 CO OSC
¾
Oscillator pin
PA7/RES
PA7 PAWK ST NMOS General purpose I/O. Register enabled wake-up.
RES
CO ST
¾
Reset input
PB0~PB5 PBn PBPU ST CMOS General purpose I/O. Register enabled pull-up.
PC0~PC3 PCn PCPU ST CMOS General purpose I/O. Register enabled pull-up.
VDD VDD
¾
PWR
¾
Power supply
VSS VSS
¾
PWR
¾
Ground
Note: I/T: Input type; O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option
ST: Schmitt Trigger input; CMOS: CMOS output; AN: analog input
SCOM= software controlled LCD COM
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
HT46R064/065/066/0662/067
Rev. 1.10 5 June 9, 2009

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